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Additional info for An introduction to differentiable manifolds and riemannian geometry
1. 7 shows a sketch for the parallel accumulation of a product. In the circuit a 106 to 170 bit shifter is used. The four additions are to be performed in parallel. So four read/write ports are to be provided for the LA RAM. A sophisticated logic must be used for the generation of the carry resolution address, since this address must be generated very quickly. Again the LA RAM needs only one address decoder to find the start address for an addition. The more significant parts of the product are added to the contents 24 1.
Here we discuss the solution of two pipeline conflicts which with high probability are the most frequent occurrences. One conflict situation occurs if two consecutive products carry the same exponent e. In this case the two summands touch the same three words of the LA. Then the second summand is unable to read its partner for the addition from the local memory because it is not yet available. This situation is checked by the hardware where the exponents e and e' of two consecutive summands are compared.
This adder selection can reduce the power consumption for the accumulation step significantly. The carry resolution method that has been discussed so far is quite natural. It is simple and does not require particular hardware support. If long scalar products are being computed it works very well. Only at the end of the accumulation, if no more summands are coming, a few additional cycles may be required to absorb the remaining carries. Then a rounding can be executed. However, this number of additional cycles for the carry resolution at the end of the accumulation, although it is small in general, depends on the data and is unpredictable.